Coding Schemes for Implementation of Fault Tolerant Parrallel Filter

Nutenki Siddhartha, G. Renuka

Abstract


Digital filters are utilized as a one of flag handling and correspondence frameworks. At times, the unwavering quality of those frameworks is basic, and blame tolerant channel executions are needed. Throughout the years, numerous systems that endeavor the channels' structure and properties to accomplish adaptation to internal failure have been proposed. As innovation scales, it empowers more unpredictable frameworks that join many channels. In those perplexing frameworks, it is regular that a portion of the channels work in parallel. A plan in view of big rectification coding has been as of late proposed to protect parallel channels. In that plan, each channel is deal with as a bit, and excess channels that go about as equality check bits are acquainted with distinguish and rectify blunders. In this short, applying coding systems to secure parallel channels is tended to in a more broad manner. This decreases the assurance overhead and makes the quantity of excess channels autonomous of the quantity of parallel channels. The proposed technique is first described and then illustrated with two case studies. Finally, both the effectiveness in protecting against errors and the cost are evaluated for a field-programmable gate array implementation.

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DOI: http://doi.org/10.11591/ijaas.v7.i4.pp353-360

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International Journal of Advances in Applied Sciences (IJAAS)
p-ISSN 2252-8814, e-ISSN 2722-2594
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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